In semiconductor production, it is often necessary to accurately stack and bond two or more integrated circuit chips or wafers to one another. Such alignment and stacking must be carried out with a high degree of accuracy so as to prevent damage to the chips or wafers. As illustrated in FIG. 1, this process traditionally employed “bump to bump” bonding whereby a series of bumps or protrusions on a first chip or wafer was aligned with, and bonded to a corresponding series of bumps or protrusions on a second chip or wafer. As can be seen in FIG. 1, this procedure did not have any means to ensure proper mechanical alignment of the two chips or wafers, and therefore required a bonding tool having a high degree of accuracy. In the case illustrated in FIG. 1, a high degree of misalignment is shown for illustration. Even misalignment of a lesser degree can deleteriously affect the electrical and possibly mechanical properties of the resulting structure, however.
Therefore, there exists a need for a system of stacking and bonding integrated circuits that provides mechanical alignment of the chips or wafers, and reduces the risk of damage.